Welcome to HackChina.com!
Language/语言:            
Open Source Projects Search Engine
     
FPGAyinpin.rar

  VHDL-FPGA-Verilog    VHDL   

Download Source Codes (866.64 kB)

FPGA-based VHDL Programming realize a variety of audio signals, are used by companies fusion_startkit weeks Ligong development board.

sponser links:




sponser links:

Project Files: 
NameSizeDate


 designer.log8.87 kB22-02-08 19:22


 designer_genhdl.log7.36 kB22-02-08 19:02


 main.adb525.50 kB22-02-08 19:22


 verify.log233.00 B22-02-08 19:16


 main.ide_des654.00 B22-02-08 19:22


 main.pdb105.00 kB22-02-08 19:17


 <main.pdb.depends>0.00 22-02-08 19:17


 main.stp89.37 kB22-02-08 19:16


 main.tcl169.00 B22-02-08 19:05


 $$FlashPro_FPBBALTLPT1.L$$444.00 B22-02-08 19:23


 main.log945.00 B22-02-08 19:32


 main.pro1.48 kB22-02-08 19:32


 main.pdb105.00 kB22-02-08 19:32


 music_simple_beep.adb17.50 kB22-02-08 12:57


 music_simple_beep.ide_des721.00 B22-02-08 12:57


 music_simple_beep.tcl1.34 kB22-02-08 12:57


 divide_by12.v2.01 kB22-02-08 18:20


 key_measure.v956.00 B22-02-08 15:46


 main.v4.03 kB22-02-08 19:00


 music_440HZ.v963.00 B22-02-08 13:15


 music_ambulance_siren.v910.00 B22-02-08 13:29


 music_high_speed_pursuit.v915.00 B22-02-08 18:58


 music_note_A_440HZ.v691.00 B22-02-08 14:17


 music_parameter.v684.00 B22-02-08 13:24


 music_parameter.vhd22.00 B22-02-08 13:15


 music_police_siren.v897.00 B22-02-08 18:39


 music_simple_beep.v1.12 kB22-02-08 12:55


 music_tune.v2.25 kB22-02-08 18:20


 simple_beep.prj6.60 kB22-02-08 19:32


 meminit.dat2.75 kB22-02-08 17:07


 modelsim.ini222.00 B22-02-08 17:07


 modelsim.ini.sav220.00 B22-02-08 12:48


 PLL_25M.cxf1.49 kB22-02-08 13:01


 PLL_25M.gen482.00 B22-02-08 13:01


 PLL_25M.log2.54 kB22-02-08 13:01


 PLL_25M.v2.45 kB22-02-08 13:01


 PLL_25M_work.ixf1.05 kB22-02-08 13:01


 smartgen.aws397.00 B22-02-08 17:07


 <.recordref>0.00 22-02-08 19:01


 main.srr4.18 kB22-02-08 15:35


 main.areasrr16.73 kB22-02-08 19:01


 main.edn429.83 kB22-02-08 19:01


 <main.map>0.00 22-02-08 19:01


 main.sdf319.93 kB22-02-08 19:01


 main.srd180.07 kB22-02-08 19:01


 main.srm486.32 kB22-02-08 19:01


 main.srr30.52 kB22-02-08 19:01


 main.srs32.24 kB22-02-08 19:01


 main.tlg2.31 kB22-02-08 19:01


 main_drc.rpt6.14 kB22-02-08 19:02


 main_sdc.sdc310.00 B22-02-08 19:01


 main_syn.prd289.00 B22-02-08 15:41


 main_syn.prj1.91 kB22-02-08 19:01


 music_simple_beep.areasrr1.59 kB22-02-08 12:56


 music_simple_beep.edn31.82 kB22-02-08 12:56


 <music_simple_beep.map>0.00 22-02-08 12:56


 music_simple_beep.sdf12.47 kB22-02-08 12:56


 music_simple_beep.srd10.09 kB22-02-08 12:56


 music_simple_beep.srm178.78 kB22-02-08 12:56


 music_simple_beep.srr12.33 kB22-02-08 12:56


 music_simple_beep.srs1.42 kB22-02-08 12:56


 music_simple_beep.tlg166.00 B22-02-08 12:56


 music_simple_beep_drc.rpt5.50 kB22-02-08 12:56


 music_simple_beep_sdc.sdc376.00 B22-02-08 12:56


 music_simple_beep_syn.prj441.00 B22-02-08 12:55


 run_options.txt2.10 kB22-02-08 19:01


 stdout.log672.00 B22-02-08 19:06


 main.msg4.09 kB22-02-08 19:05


 main.plg1.40 kB22-02-08 19:01


 <music_simple_beep.msg>0.00 22-02-08 12:57


 music_simple_beep.plg381.00 B22-02-08 12:56


 traplog.tlg4.01 kB22-02-08 19:01


 project.lst54.00 B22-02-08 17:07


 viewdraw.ini1.63 kB22-02-08 17:07


 程序说明.txt1.90 kB22-02-08 19:22


 <projectData>0.00 06-09-08 23:40


 <main.dtf>0.00 06-09-08 23:40


 <main_fp>0.00 06-09-08 23:40


 <simulation>0.00 06-09-08 23:40


 <impl1>0.00 06-09-08 23:40


 <PLL_25M>0.00 06-09-08 23:40


 <backup>0.00 06-09-08 23:40


 <syntmp>0.00 06-09-08 23:40


 <sch>0.00 06-09-08 23:40


 <sym>0.00 06-09-08 23:40


 <vf>0.00 06-09-08 23:40


 <wir>0.00 06-09-08 23:40


 <component>0.00 06-09-08 23:40


 <constraint>0.00 06-09-08 23:40


 <coreconsole>0.00 06-09-08 23:40


 <designer>0.00 06-09-08 23:40


 <hdl>0.00 06-09-08 23:40


 <phy_synthesis>0.00 06-09-08 23:40


 <simulation>0.00 06-09-08 23:40


 <smartgen>0.00 06-09-08 23:40


 <stimulus>0.00 06-09-08 23:40


 <synthesis>0.00 06-09-08 23:40


 <viewdraw>0.00 06-09-08 23:40


 <simple_beep>0.00 06-09-08 23:40


 <FPGA控制播放各种音频>0.00 06-09-08 23:40



...


sponser links:

Related Items:
  1. VHDL-Programming-by-(E-Books - Others) - VHDL Programming by Example (McGraw.Hill an electronic versi ...
  2. VHDL_Programming_by_(VHDL-FPGA-Verilog - Others) - Based on the large number of examples of VHDL. For a newcome ...
  3. VHDLProgrammingbyExa(VHDL-FPGA-Verilog - VHDL) - VHDL programming by example ...
  4. Examples_VHDL.rar(VHDL-FPGA-Verilog - VHDL) - Introduction with VHDL description of a variety of hardware ...
  5. AudioCodeVC.rar(Audio program - Visual C++) - The use of Visual C++ implementation of the audio data signa ...
  6. vhdlandfir.zip(Compress-Decompress algrithms - VHDL) - Introduce the design of digital filters using VHDL programmi ...
  7. VHDL.rar(VHDL-FPGA-Verilog - VHDL) - VHDL programming language introduced the basic grammar, and ...
  8. LDPC_Behavioral_VHDL(VHDL-FPGA-Verilog - VHDL) - Using VHDL language LDPC code hardware implementation langua ...
  9. vhdl.rar(E-Books - Others) - Introduction of the VHDL programming knowledge, and 100 case ...
  10. VHDLfullCODEforCAcod(software engineering - Others) - VHDLfullCODEforCAcodeGenerator.rar for the CA code generator ...
  11. TLC5510VHDL.rar(VHDL-FPGA-Verilog - VHDL) - Features: Based on the VHDL language, realize high-speed A/D ...
  12. NETinavarietyofdatab(Database system - C++) - C# code in the database links, including links to a variety ...
  13. 109201251VHDL.rar(VHDL-FPGA-Verilog - VHDL) - Use VHDL to realize the digital frequency synthesis technolo ...
  14. 8sizecomparator.Rar(VHDL-FPGA-Verilog - Others) - eight compared with the size of the VHDL source code, Magnit ...
  15. vhdl.rar(VHDL-FPGA-Verilog - VHDL) - This is a book on VHDL programming, on-line suddenly found, ...
  16. vhdl.zip(Other Books - VHDL) - vhdl ppts giving inflormation of VHDL programming ...
  17. vhdlcode.rar(Other Embeded program - C++) - vhdl programming examples and a good source, an eye-catcher, ...
  18. vhdl.rar(VHDL-FPGA-Verilog - VHDL) - This is a keyboard based on the VHDL programming language so ...
  19. VHDL-FPGA-clock.rar(Other systems - Others) - FPGA design, VHDL programming, max plus simulation, in the a ...
  20. VHDL_A_Logic_Synthes(VHDL-FPGA-Verilog - VHDL) - vhdl programming from beginner level ...





Links:
Contact us | Your Ads here
© 2010 HackChina.com Dev by HackChina Team   Elapsed:97.456ms